1. Field of the Invention
The present invention relates generally to power amplifiers, and more specifically to the pre-distortion of power amplifiers.
2. Related Art
A critical component of any communications system is the power amplifier in the transmitter. The function of the power amplifier is to amplify an input data signal and thereby create a high powered version of that input data signal for subsequent output into a transmission channel. The greater the amplification capability of the power amplifier, the greater the resulting output power level, and therefore the larger the geographic area covered by the communications system. In addition to the increased coverage area, an increased output power level typically results in increased efficiency (as measured by the ratio of resulting output power to input direct current (DC) power to the power amplifier).
However, concurrent with these improvements in link coverage and power amplifier efficiency, the distortion in the output data signal unfortunately increases with increasing power level. Such distortion reveals itself in many ways, including as a spillover of transmitted power into frequencies outside the intended frequency band of transmission. It also reveals itself as a degradation of the quality of the in-band signal such that larger constellations and higher throughput rates are inhibited at higher transmission powers. Such distortion, a result of the nonlinearities in the power amplifier, directly diminishes the useful output power range of the power amplifier. It is therefore desirable to minimize the distortion and to thereby capitalize on as much of the available output power from the power amplifier as possible.
Traditionally, the final stage of power amplification in a communications transmission system has been performed “off-chip” in order to simultaneously achieve the two goals of having sufficient output power and low distortion. Such off-chip power amplifiers are expensive. Moreover, they do not provide the same integration opportunities afforded by an on-chip amplifier, such as optimization of associated power amplifier (PA) circuitry, integration of the power supplies, consistency of PAs (from one to the next), ease of testing and calibration, and reliable connectivity. It is therefore highly desirable to minimize the distortion of power amplifiers in general, and in particular on-chip power amplifiers, so that benefits of integration can be realized while still providing the required high level of output power.
The advent of multiple-input multiple-output (MIMO) communications system architectures has intensified the challenges described above. A MIMO approach exploits the spatial diversity implicit in having multiple transmitters communicating the same data signal to multiple receivers. By spatially propagating more than one version of the same data signal, improvements in communications coverage and link quality readily materialize over that routinely available from the traditional single-input single-output approach.
To fully capture these MIMO benefits, a premium is therefore placed on the ability to readily fabricate a multiplicity of low distortion power amplifiers, with uniform performance characteristics, at low cost, and in a form that can be readily integrated with the rest of the transmitter functionality. While many of these benefits can be realized using off-chip power amplifiers, the full potential of benefits comes into fruition through the use of low distortion on-chip power amplifiers.
What is needed, therefore, is an approach that solves one or more of these power amplifier challenges in a modern data communications system, namely increased output power, reduced distortion, greater ease of integration with the associated circuitry in the transmitter chain, and lower cost. With respect to a MIMO transmitter application, it is highly desirable that an approach be found that addresses not only the above challenges, but also the uniformity of the performance characteristics of a multiplicity of power amplifiers.